Posts by feet1st

21) Message boards : RALPH@home bug list : minirosetta 1.58 (Message 4654)
Posted 2 Feb 2009 by Profile feet1st
Post:
I finally decided to take the time to report this petty issue. Note that I didn't have a v1.58 task to take the screen shot from at the time, but seems to be the same scaling issue there from what I've seen so far. This has been the case for quite some time in the graphic. At least on my machines. The specific machine, Rosetta version, task type all seem to have the same problem.

I use Windows XP, and display resolution of 1024 x 768 which is pretty standard I believe. By default, when I open the graphic of a running task, it comes up to a less then full screen window (see image below). And if you note the title bar seems to be scaled in as part of the low energy and the RMSD, perhaps all boxes on the top half of the graphic. The low energy box and the Native box should have the same displayable height. But they don't.

As this one ran on 1.56, it wasn't showing an RMSD history at all. But if it were, you'd see it take longer to appear in the display then the energy graph. And if you maximize to full screen, you will see more of the RMSD history (the title bar being scaled to less of the window leaves more room to show the RMSD), then with the original window size.

Let me know if I'm the lone wolf on this issue or what further video or other details may be relevant.

22) Message boards : RALPH@home bug list : Beta 5.98 downloaded (Message 4618)
Posted 30 Jan 2009 by Profile feet1st
Post:
It is a work unit test, and not a code test. 5.98 is still an active application on Rosetta. They just don't always send work that calls for it.
23) Message boards : RALPH@home bug list : minirosetta v1.54 bug thread (Message 4593)
Posted 28 Jan 2009 by Profile feet1st
Post:
So what exactly is the week override setting ?


In the preferences on the advanced view of the BOINC Manager, you can define specific days of the week you wish BOINC to use CPU, and/or network. Let's a school or corporate environment run only on weekends for example.
24) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4579)
Posted 27 Jan 2009 by Profile feet1st
Post:
Its not suuuuuper urgent...


Agreed. The only ill effect should be slightly higher disk space usage. Even then, it should still be within the normal range.
25) Message boards : RALPH@home bug list : minirosetta v1.54 bug thread (Message 4577)
Posted 27 Jan 2009 by Profile feet1st
Post:
FYI, another task ended after 99 models completed if you wanted to review it.
http://ralph.bakerlab.org/result.php?resultid=1267792
26) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4576)
Posted 27 Jan 2009 by Profile feet1st
Post:
I was starting to think that must be what was occuring. And also was thinking that once the model was completed, that these temp files should be deletable. So, great minds think alike I guess... and so do we!

Glad the info. came of some good use.
27) Message boards : RALPH@home bug list : minirosetta v1.54 bug thread (Message 4567)
Posted 27 Jan 2009 by Profile feet1st
Post:
RE: limiting to 99 models
You will want to keep an eye on this one:
testD_cc2_1_8_mammoth_mix_cen_cst_hb_t327__IGNORE_THE_REST_1YYVA_5_7103_1_0

I've got 3hrs in to it so far and have 18 models, so I'm on track to exceed the new limit of 99 in my 24hr runtime preference. So this will be a good test.


Bingo, reported back with 99 models and only used 55354.08 (15.37hrs on my 24hr preference).
28) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4561)
Posted 27 Jan 2009 by Profile feet1st
Post:
My apologies in advance for this long post, but I thought it the best method of report. I know you wanted feedback on the checkpointing. Specifically the checkpoint buffering that I understand should be included in v1.53.

I have this v1.53 task, it's been running for about 11.5hrs on my 24hr preference. My BOINC client confirms my "write at most..." setting is 600 seconds. This task has generated 122 checkpoints so far (as per the boinc_checkpoint_count.txt file) and is now on model 106, and perhaps so many models is the root cause, but here is what I see in the slots file.

I believe you indicated that at the end of a model, we would see a disk write, regardless of preference and any other buffered checkpoints. But, I seem to be seeing a large number of writes in a single minute, with several file numbers.

So, showing you the directory seems the only way... (sorted by date/time, and colorized where heavy disk periods seem to be. Some just seem to have written a large number of files, others seem to have written multiple checkpoints [if that is what the numbers are], in a single minute)



11/18/2008 12:24 PM 138 t327_.fasta
11/18/2008 01:19 PM 666 T0327.all0.T20.aln.filt.2F2EA_2.mapping
11/18/2008 01:19 PM 667 T0327.all0.T20.aln.filt.2F2EA_4.mapping
11/18/2008 01:19 PM 628 T0327.all0.T20.aln.filt.2F2EA_5.mapping
11/18/2008 01:19 PM 672 T0327.all0.T20.aln.filt.2F2EA_6.mapping
11/18/2008 01:19 PM 594 T0327.all0.T20.aln.filt.2F2EA_7.mapping
11/18/2008 01:19 PM 668 T0327.all0.T20.aln.filt.2F2EA_8.mapping
11/18/2008 01:19 PM 672 T0327.all0.T20.aln.filt.2F2EA_9.mapping
11/18/2008 01:19 PM 628 T0327.all0.T20.aln.filt.2F2EA_12.mapping
11/18/2008 01:19 PM 669 T0327.all0.T20.aln.filt.2F2EA_11.mapping
11/18/2008 01:19 PM 602 T0327.all0.T20.aln.filt.2F2EA_10.mapping
11/18/2008 01:19 PM 700 T0327.all0.T20.aln.filt.1UB9A_2.mapping
11/18/2008 01:19 PM 601 T0327.all0.T20.aln.filt.2F2EA_15.mapping
11/18/2008 01:19 PM 671 T0327.all0.T20.aln.filt.2F2EA_14.mapping
11/18/2008 01:19 PM 676 T0327.all0.T20.aln.filt.2F2EA_16.mapping
11/18/2008 01:19 PM 646 T0327.all0.T20.aln.filt.1UB9A_5.mapping
11/18/2008 01:19 PM 696 T0327.all0.T20.aln.filt.1UB9A_6.mapping
11/18/2008 01:19 PM 670 T0327.all0.T20.aln.filt.1UB9A_10.mapping
11/18/2008 01:19 PM 697 T0327.all0.T20.aln.filt.1UB9A_8.mapping
11/18/2008 01:19 PM 694 T0327.all0.T20.aln.filt.1UB9A_13.mapping
11/18/2008 01:19 PM 636 T0327.all0.T20.aln.filt.1XMAA_10.mapping
11/18/2008 01:19 PM 636 T0327.all0.T20.aln.filt.1XMAA_13.mapping
11/18/2008 01:19 PM 675 T0327.all0.T20.aln.filt.1XMAA_11.mapping
11/18/2008 01:19 PM 682 T0327.all0.T20.aln.filt.1XMAA_14.mapping
11/18/2008 01:19 PM 659 T0327.all0.T20.aln.filt.1XMAA_15.mapping
11/18/2008 01:19 PM 683 T0327.all0.T20.aln.filt.1XMAA_16.mapping
11/18/2008 01:19 PM 645 T0327.all0.T20.aln.filt.1XMAA_17.mapping
11/18/2008 01:19 PM 595 T0327.all0.T20.aln.filt.1YYVA_3.mapping
11/18/2008 01:19 PM 674 T0327.all0.T20.aln.filt.1YYVA_6.mapping
11/18/2008 01:19 PM 637 T0327.all0.T20.aln.filt.1YYVA_5.mapping
11/18/2008 01:19 PM 671 T0327.all0.T20.aln.filt.1YYVA_8.mapping
11/18/2008 01:19 PM 612 T0327.all0.T20.aln.filt.1YYVA_7.mapping
11/18/2008 01:19 PM 678 T0327.all0.T20.aln.filt.1YYVA_10.mapping
11/18/2008 01:19 PM 612 T0327.all0.T20.aln.filt.1YYVA_9.mapping
11/18/2008 01:19 PM 677 T0327.all0.T20.aln.filt.1YYVA_14.mapping
11/18/2008 01:19 PM 676 T0327.all0.T20.aln.filt.1YYVA_12.mapping
11/18/2008 01:20 PM 637 T0327.all0.T20.aln.filt.2FSWA_1.mapping
11/18/2008 01:20 PM 604 T0327.all0.T20.aln.filt.2FSWA_3.mapping
11/18/2008 01:20 PM 653 T0327.all0.T20.aln.filt.2FSWA_2.mapping
11/18/2008 01:20 PM 674 T0327.all0.T20.aln.filt.2FSWA_5.mapping
11/18/2008 01:20 PM 691 T0327.all0.T20.aln.filt.2FSWA_4.mapping
11/18/2008 01:20 PM 612 T0327.all0.T20.aln.filt.2FSWA_6.mapping
11/18/2008 01:20 PM 671 T0327.all0.T20.aln.filt.2FSWA_7.mapping
11/18/2008 01:20 PM 674 T0327.all0.T20.aln.filt.2FSWA_8.mapping
11/18/2008 01:20 PM 678 T0327.all0.T20.aln.filt.2FSWA_9.mapping
11/18/2008 01:20 PM 587 T0327.all0.T20.aln.filt.2FSWA_10.mapping
11/18/2008 01:20 PM 670 T0327.all0.T20.aln.filt.2FSWA_11.mapping
11/18/2008 01:20 PM 566 T0327.all0.T20.aln.filt.2FSWA_12.mapping
11/18/2008 01:20 PM 601 T0327.all0.T20.aln.filt.2FSWA_13.mapping
11/18/2008 01:20 PM 683 T0327.all0.T20.aln.filt.2ESHA_14.mapping
11/18/2008 01:21 PM 663 T0327.all0.T20.aln.filt.2FRHA_3.mapping
11/18/2008 01:21 PM 698 T0327.all0.T20.aln.filt.2FRHA_10.mapping
11/18/2008 01:24 PM 629,605 boinc_aat327_03_05.200_v1_3.gz
11/18/2008 01:25 PM 1,731,406 boinc_aat327_09_05.200_v1_3.gz
11/18/2008 01:30 PM 135,465 1ub9.pdb
11/18/2008 01:31 PM 141,309 1xma.pdb
11/18/2008 01:31 PM 149,160 1yyv.pdb
11/18/2008 01:32 PM 154,587 2esh.pdb
11/18/2008 01:33 PM 180,600 2f2e.pdb
11/18/2008 01:34 PM 175,317 2frh.pdb
11/18/2008 01:35 PM 141,402 2fsw.pdb
11/18/2008 01:35 PM 39,881 2F2EA_2.pdb
11/18/2008 01:35 PM 39,881 2F2EA_4.pdb
11/18/2008 01:35 PM 39,881 2F2EA_5.pdb
11/18/2008 01:35 PM 39,881 2F2EA_6.pdb
11/18/2008 01:35 PM 39,881 2F2EA_7.pdb
11/18/2008 01:35 PM 39,881 2F2EA_8.pdb
11/18/2008 01:35 PM 39,881 2F2EA_10.pdb
11/18/2008 01:35 PM 39,881 2F2EA_9.pdb
11/18/2008 01:35 PM 39,881 2F2EA_11.pdb
11/18/2008 01:35 PM 39,881 2F2EA_12.pdb
11/18/2008 01:35 PM 39,881 2F2EA_14.pdb
11/18/2008 01:35 PM 39,881 2F2EA_16.pdb
11/18/2008 01:35 PM 39,881 2F2EA_15.pdb
11/18/2008 01:35 PM 39,881 1UB9A_2.pdb
11/18/2008 01:35 PM 39,881 1UB9A_5.pdb
11/18/2008 01:35 PM 39,881 1UB9A_6.pdb
11/18/2008 01:35 PM 39,881 1UB9A_8.pdb
11/18/2008 01:35 PM 39,881 1UB9A_10.pdb
11/18/2008 01:35 PM 39,881 1UB9A_13.pdb
11/18/2008 01:35 PM 39,881 1XMAA_10.pdb
11/18/2008 01:35 PM 39,881 1XMAA_11.pdb
11/18/2008 01:35 PM 39,881 1XMAA_13.pdb
11/18/2008 01:35 PM 39,881 1XMAA_15.pdb
11/18/2008 01:35 PM 39,881 1XMAA_14.pdb
11/18/2008 01:35 PM 39,881 1XMAA_16.pdb
11/18/2008 01:36 PM 39,881 1XMAA_17.pdb
11/18/2008 01:36 PM 39,881 1YYVA_3.pdb
11/18/2008 01:36 PM 39,881 1YYVA_5.pdb
11/18/2008 01:36 PM 39,881 1YYVA_6.pdb
11/18/2008 01:36 PM 39,881 1YYVA_7.pdb
11/18/2008 01:36 PM 39,881 1YYVA_8.pdb
11/18/2008 01:36 PM 39,881 1YYVA_9.pdb
11/18/2008 01:36 PM 39,881 1YYVA_10.pdb
11/18/2008 01:36 PM 39,881 1YYVA_12.pdb
11/18/2008 01:36 PM 39,881 1YYVA_14.pdb
11/18/2008 01:37 PM 39,881 2FSWA_1.pdb
11/18/2008 01:37 PM 39,881 2FSWA_2.pdb
11/18/2008 01:37 PM 39,881 2FSWA_3.pdb
11/18/2008 01:37 PM 39,881 2FSWA_4.pdb
11/18/2008 01:37 PM 39,881 2FSWA_6.pdb
11/18/2008 01:37 PM 39,881 2FSWA_5.pdb
11/18/2008 01:37 PM 39,881 2FSWA_7.pdb
11/18/2008 01:37 PM 39,881 2FSWA_8.pdb
11/18/2008 01:37 PM 39,881 2FSWA_10.pdb
11/18/2008 01:37 PM 39,881 2FSWA_9.pdb
11/18/2008 01:37 PM 39,881 2FSWA_11.pdb
11/18/2008 01:37 PM 39,881 2FSWA_13.pdb
11/18/2008 01:37 PM 39,881 2ESHA_14.pdb
11/18/2008 01:38 PM 39,881 2FRHA_3.pdb
11/18/2008 01:38 PM 39,881 2FRHA_10.pdb
11/20/2008 05:14 PM 94,689 native.pdb
12/01/2008 01:11 PM 43 core_2F2EA_16_noloop_loops.txt
12/01/2008 01:11 PM 43 core_2F2EA_14_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2F2EA_11_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2ESHA_14_noloop_loops.txt
12/01/2008 01:11 PM 89 core_1YYVA_9_noloop_loops.txt
12/01/2008 01:11 PM 89 core_1YYVA_7_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2FSWA_7_noloop_loops.txt
12/01/2008 01:11 PM 43 core_2FRHA_10_noloop_loops.txt
12/01/2008 01:11 PM 89 core_1YYVA_5_noloop_loops.txt
12/01/2008 01:11 PM 89 core_1YYVA_10_noloop_loops.txt
12/01/2008 01:11 PM 66 core_1XMAA_17_noloop_loops.txt
12/01/2008 01:11 PM 66 core_1XMAA_15_noloop_loops.txt
12/01/2008 01:11 PM 66 core_1XMAA_14_noloop_loops.txt
12/01/2008 01:11 PM 89 core_1XMAA_10_noloop_loops.txt
12/01/2008 01:11 PM 43 core_1UB9A_8_noloop_loops.txt
12/01/2008 01:11 PM 43 core_1UB9A_6_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2F2EA_2_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2FSWA_5_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2F2EA_4_noloop_loops.txt
12/01/2008 01:11 PM 89 core_2FSWA_3_noloop_loops.txt
12/01/2008 01:11 PM 43 core_2FSWA_2_noloop_loops.txt
12/01/2008 01:11 PM 89 core_2F2EA_7_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2FSWA_13_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2F2EA_9_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2FSWA_10_noloop_loops.txt
12/01/2008 01:11 PM 89 core_2FRHA_3_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2FSWA_8_noloop_loops.txt
12/01/2008 01:11 PM 66 core_2F2EA_6_noloop_loops.txt
12/01/2008 01:11 PM 89 core_1YYVA_6_noloop_loops.txt
12/01/2008 01:12 PM 89 core_2FSWA_6_noloop_loops.txt
12/01/2008 01:12 PM 43 core_2FSWA_4_noloop_loops.txt
12/01/2008 01:12 PM 66 core_2FSWA_1_noloop_loops.txt
12/01/2008 01:12 PM 43 core_2FSWA_11_noloop_loops.txt
12/01/2008 01:12 PM 66 core_2F2EA_8_noloop_loops.txt
12/01/2008 01:12 PM 66 core_2F2EA_5_noloop_loops.txt
12/01/2008 01:12 PM 43 core_2F2EA_15_noloop_loops.txt
12/01/2008 01:12 PM 66 core_2F2EA_12_noloop_loops.txt
12/01/2008 01:12 PM 89 core_2F2EA_10_noloop_loops.txt
12/01/2008 01:12 PM 89 core_1YYVA_8_noloop_loops.txt
12/01/2008 01:12 PM 89 core_1YYVA_3_noloop_loops.txt
12/01/2008 01:12 PM 89 core_1YYVA_14_noloop_loops.txt
12/01/2008 01:12 PM 89 core_1YYVA_12_noloop_loops.txt
12/01/2008 01:12 PM 66 core_1XMAA_16_noloop_loops.txt
12/01/2008 01:12 PM 89 core_1XMAA_13_noloop_loops.txt
12/01/2008 01:12 PM 66 core_1XMAA_11_noloop_loops.txt
12/01/2008 01:12 PM 43 core_1UB9A_5_noloop_loops.txt
12/01/2008 01:12 PM 43 core_1UB9A_2_noloop_loops.txt
12/01/2008 01:12 PM 43 core_1UB9A_13_noloop_loops.txt
12/01/2008 01:12 PM 66 core_2FSWA_9_noloop_loops.txt
12/01/2008 01:12 PM 43 core_1UB9A_10_noloop_loops.txt
01/14/2009 11:51 PM 3,618 good_template_config_file.txt
01/14/2009 11:51 PM 0 1
01/26/2009 12:44 AM 114 graphics_app
01/26/2009 12:44 AM 105 minirosetta_1.53_windows_intelx86.exe
01/26/2009 12:44 AM 81 Helvetica.txf
01/26/2009 12:44 AM 4,165 init_data.xml
01/26/2009 12:44 AM 136 test_cc_1_8_nocst4.foldcst_chunk_general.t327_.mtyka.boinc_files.zip
01/26/2009 12:44 AM 101 minirosetta_database.zip
01/26/2009 12:44 AM 130 default.out.gz
01/26/2009 12:44 AM 132 test_cc_1_8_nocst4.foldcst_chunk_general.t327_.mtyka.flags.boinc
01/26/2009 12:44 AM 0 boinc_lockfile
01/26/2009 12:44 AM <DIR> minirosetta_database
01/26/2009 12:44 AM 3 boinc_init_count.txt
01/26/2009 12:59 AM 12,359 chk_S_1UB9A_2_00000001_ClassicAbinitio___lc_1.out
01/26/2009 12:59 AM 8,677 chk_S_1UB9A_2_00000001_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 01:09 AM 12,680 chk_S_1UB9A_2_00000002_ClassicAbinitio___lc_1.out
01/26/2009 01:09 AM 8,551 chk_S_1UB9A_2_00000002_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 01:09 AM 8,630 chk_S_1UB9A_2_00000002_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 01:09 AM 12,365 chk_S_1UB9A_2_00000002_ClassicAbinitio___lc_2.out
01/26/2009 01:18 AM 8,691 chk_S_1UB9A_2_00000003_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 01:18 AM 12,365 chk_S_1UB9A_2_00000003_ClassicAbinitio___lc_1.out
01/26/2009 01:29 AM 8,632 chk_S_1UB9A_2_00000004_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 01:29 AM 12,365 chk_S_1UB9A_2_00000004_ClassicAbinitio___lc_1.out
01/26/2009 01:38 AM 8,666 chk_S_1UB9A_2_00000005_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 01:38 AM 12,682 chk_S_1UB9A_2_00000005_ClassicAbinitio___lc_1.out
01/26/2009 01:38 AM 12,365 chk_S_1UB9A_2_00000005_ClassicAbinitio___lc_2.out
01/26/2009 01:38 AM 8,699 chk_S_1UB9A_2_00000005_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 02:47 AM 8,647 chk_S_1UB9A_2_00000006_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 02:47 AM 12,680 chk_S_1UB9A_2_00000006_ClassicAbinitio___lc_1.out
01/26/2009 02:47 AM 8,629 chk_S_1UB9A_2_00000006_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 02:47 AM 12,365 chk_S_1UB9A_2_00000006_ClassicAbinitio___lc_2.out
01/26/2009 03:59 AM 12,680 chk_S_1UB9A_2_00000007_ClassicAbinitio___lc_1.out
01/26/2009 03:59 AM 8,698 chk_S_1UB9A_2_00000007_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 03:59 AM 12,365 chk_S_1UB9A_2_00000007_ClassicAbinitio___lc_2.out
01/26/2009 03:59 AM 8,724 chk_S_1UB9A_2_00000007_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 04:12 AM 8,740 chk_S_1UB9A_2_00000008_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:12 AM 12,680 chk_S_1UB9A_2_00000008_ClassicAbinitio___lc_1.out
01/26/2009 04:12 AM 8,722 chk_S_1UB9A_2_00000008_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 04:12 AM 12,365 chk_S_1UB9A_2_00000008_ClassicAbinitio___lc_2.out
01/26/2009 04:21 AM 8,701 chk_S_1UB9A_2_00000009_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:21 AM 12,365 chk_S_1UB9A_2_00000009_ClassicAbinitio___lc_1.out
01/26/2009 04:34 AM 8,702 chk_S_1UB9A_2_00000010_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:34 AM 12,680 chk_S_1UB9A_2_00000010_ClassicAbinitio___lc_1.out
01/26/2009 04:34 AM 12,365 chk_S_1UB9A_2_00000010_ClassicAbinitio___lc_2.out
01/26/2009 04:34 AM 8,757 chk_S_1UB9A_2_00000010_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 04:43 AM 12,365 chk_S_1UB9A_2_00000011_ClassicAbinitio___lc_1.out
01/26/2009 04:43 AM 8,738 chk_S_1UB9A_2_00000011_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:51 AM 8,657 chk_S_1UB9A_2_00000012_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:51 AM 12,365 chk_S_1UB9A_2_00000012_ClassicAbinitio___lc_1.out
01/26/2009 05:00 AM 8,719 chk_S_1UB9A_2_00000013_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 05:00 AM 12,365 chk_S_1UB9A_2_00000013_ClassicAbinitio___lc_1.out
01/26/2009 05:08 AM 22,784 chk_S_1UB9A_2_00000001_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 8,687 chk_S_1UB9A_2_00000001_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 8,759 chk_S_1UB9A_2_00000001_Abrelax__fastrelax_fa.rng.state.gz
01/26/2009 05:08 AM 23,193 chk_S_1UB9A_2_00000001_Abrelax__fastrelax_fa.out
01/26/2009 05:08 AM 8,759 chk_S_1UB9A_2_00000002_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000002_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 8,676 chk_S_1UB9A_2_00000002_Abrelax__fastrelax_fa.rng.state.gz
01/26/2009 05:08 AM 23,178 chk_S_1UB9A_2_00000002_Abrelax__fastrelax_fa.out
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01/26/2009 05:08 AM 8,624 chk_S_1UB9A_2_00000004_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 8,632 chk_S_1UB9A_2_00000004_Abrelax__fastrelax_fa.rng.state.gz
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01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000005_Abrelax__rg_state_fa.out
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01/26/2009 05:08 AM 8,696 chk_S_1UB9A_2_00000005_Abrelax__fastrelax_fa.rng.state.gz
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01/26/2009 05:08 AM 8,709 chk_S_1UB9A_2_00000007_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000007_Abrelax__rg_state_fa.out
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01/26/2009 05:08 AM 8,689 chk_S_1UB9A_2_00000009_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000009_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 8,722 chk_S_1UB9A_2_00000009_Abrelax__fastrelax_fa.rng.state.gz
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01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000010_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 8,722 chk_S_1UB9A_2_00000010_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 8,767 chk_S_1UB9A_2_00000010_Abrelax__fastrelax_fa.rng.state.gz
01/26/2009 05:08 AM 23,178 chk_S_1UB9A_2_00000010_Abrelax__fastrelax_fa.out
01/26/2009 05:08 AM 8,767 chk_S_1UB9A_2_00000011_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000011_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 8,703 chk_S_1UB9A_2_00000011_Abrelax__fastrelax_fa.rng.state.gz
01/26/2009 05:08 AM 23,192 chk_S_1UB9A_2_00000011_Abrelax__fastrelax_fa.out
01/26/2009 05:08 AM 8,703 chk_S_1UB9A_2_00000012_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000012_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 23,192 chk_S_1UB9A_2_00000012_Abrelax__fastrelax_fa.out
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01/26/2009 05:08 AM 8,733 chk_S_1UB9A_2_00000013_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 8,689 chk_S_1UB9A_2_00000013_Abrelax__fastrelax_fa.rng.state.gz
01/26/2009 05:08 AM 23,178 chk_S_1UB9A_2_00000013_Abrelax__fastrelax_fa.out
01/26/2009 05:08 AM 8,689 chk_S_1UB9A_2_00000014_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 05:08 AM 22,790 chk_S_1UB9A_2_00000014_Abrelax__rg_state_fa.out
01/26/2009 05:08 AM 8,657 chk_S_1UB9A_2_00000014_Abrelax__fastrelax_fa.rng.state.gz
01/26/2009 05:08 AM 23,185 chk_S_1UB9A_2_00000014_Abrelax__fastrelax_fa.out
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01/26/2009 08:57 AM 22,790 chk_S_1UB9A_2_00000021_Abrelax__rg_state_fa.out
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01/26/2009 08:57 AM 22,790 chk_S_1UB9A_2_00000022_Abrelax__rg_state_fa.out
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01/26/2009 08:57 AM 8,689 chk_S_1UB9A_2_00000025_Abrelax__rg_state_fa.rng.state.gz
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01/26/2009 04:26 PM 8,654 chk_S_1UB9A_2_00000080_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000081_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,646 chk_S_1UB9A_2_00000081_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 8,691 chk_S_1UB9A_2_00000082_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000082_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,600 chk_S_1UB9A_2_00000083_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000083_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,711 chk_S_1UB9A_2_00000084_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000084_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000085_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,603 chk_S_1UB9A_2_00000085_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 8,652 chk_S_1UB9A_2_00000086_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000086_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,671 chk_S_1UB9A_2_00000087_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000087_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,680 chk_S_1UB9A_2_00000088_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000088_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,702 chk_S_1UB9A_2_00000089_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000089_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,635 chk_S_1UB9A_2_00000090_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000090_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,590 chk_S_1UB9A_2_00000091_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000091_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,716 chk_S_1UB9A_2_00000092_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000092_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000093_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,746 chk_S_1UB9A_2_00000093_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 8,721 chk_S_1UB9A_2_00000094_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000094_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 22,790 chk_S_1UB9A_2_00000095_Abrelax__rg_state_fa.out
01/26/2009 04:26 PM 8,648 chk_S_1UB9A_2_00000095_Abrelax__rg_state_fa.rng.state.gz
01/26/2009 04:30 PM 8,701 chk_S_1UB9A_2_00000095_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:30 PM 12,365 chk_S_1UB9A_2_00000095_ClassicAbinitio___lc_1.out
01/26/2009 04:38 PM 8,630 chk_S_1UB9A_2_00000096_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:38 PM 12,680 chk_S_1UB9A_2_00000096_ClassicAbinitio___lc_1.out
01/26/2009 04:38 PM 12,365 chk_S_1UB9A_2_00000096_ClassicAbinitio___lc_2.out
01/26/2009 04:38 PM 7,780 chk_S_1UB9A_2_00000096_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 04:51 PM 12,680 chk_S_1UB9A_2_00000098_ClassicAbinitio___lc_1.out
01/26/2009 04:51 PM 8,701 chk_S_1UB9A_2_00000098_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:51 PM 12,365 chk_S_1UB9A_2_00000098_ClassicAbinitio___lc_2.out
01/26/2009 04:51 PM 8,685 chk_S_1UB9A_2_00000098_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 04:56 PM 8,696 chk_S_1UB9A_2_00000099_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 04:56 PM 12,365 chk_S_1UB9A_2_00000099_ClassicAbinitio___lc_1.out
01/26/2009 05:01 PM 8,717 chk_S_1UB9A_2_00000100_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 05:01 PM 12,365 chk_S_1UB9A_2_00000100_ClassicAbinitio___lc_1.out
01/26/2009 05:09 PM 8,720 chk_S_1UB9A_2_00000101_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 05:09 PM 12,664 chk_S_1UB9A_2_00000101_ClassicAbinitio___lc_1.out
01/26/2009 05:36 PM 12,680 chk_S_1UB9A_2_00000102_ClassicAbinitio___lc_2.out
01/26/2009 05:36 PM 8,689 chk_S_1UB9A_2_00000102_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 05:36 PM 8,696 chk_S_1UB9A_2_00000102_ClassicAbinitio___lc_3.rng.state.gz
01/26/2009 05:36 PM 12,365 chk_S_1UB9A_2_00000102_ClassicAbinitio___lc_3.out
01/26/2009 05:43 PM 81,786 score.fsc
01/26/2009 05:43 PM 2,225,351 default.out
01/26/2009 05:43 PM 8,688 rng.state.gz
01/26/2009 05:43 PM 3 boinc_checkpoint_count.txt
01/26/2009 05:43 PM 10,423 jumps_pre.log
01/26/2009 05:43 PM 5,969 stderr.txt
01/26/2009 05:47 PM 658 stderrgfx.txt
01/26/2009 05:48 PM 8,639 chk_S_1UB9A_2_00000104_ClassicAbinitio___lc_1.rng.state.gz
01/26/2009 05:48 PM 12,680 chk_S_1UB9A_2_00000104_ClassicAbinitio___lc_1.out
01/26/2009 05:48 PM 8,660 chk_S_1UB9A_2_00000104_ClassicAbinitio___lc_2.rng.state.gz
01/26/2009 05:48 PM 12,365 chk_S_1UB9A_2_00000104_ClassicAbinitio___lc_2.out
01/26/2009 05:48 PM 13,158 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_1.out
01/26/2009 05:48 PM 8,676 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_1.rng.state.gz
01/26/2009 05:48 PM 8,826 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_2.rng.state.gz
01/26/2009 05:48 PM 13,234 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_2.out
01/26/2009 05:48 PM 8,635 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_1.rng.state.gz
01/26/2009 05:48 PM 13,888 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_1.out
01/26/2009 05:48 PM 8,658 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_2.rng.state.gz
01/26/2009 05:48 PM 13,888 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_2.out
01/26/2009 05:48 PM 8,657 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_3.rng.state.gz
01/26/2009 05:48 PM 13,994 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_3.out
01/26/2009 05:48 PM 8,699 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_4.rng.state.gz
01/26/2009 05:48 PM 13,994 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_4.out
01/26/2009 05:48 PM 13,994 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_5.out
01/26/2009 05:48 PM 8,688 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_5.rng.state.gz
01/26/2009 05:48 PM 13,994 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_6.out
01/26/2009 05:48 PM 8,659 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_6.rng.state.gz
01/26/2009 05:48 PM 14,102 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_7.out
01/26/2009 05:48 PM 8,632 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_7.rng.state.gz
01/26/2009 05:48 PM 8,655 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_8.rng.state.gz
01/26/2009 05:48 PM 14,102 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_8.out
01/26/2009 05:48 PM 8,591 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_9.rng.state.gz
01/26/2009 05:48 PM 14,210 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_9.out
01/26/2009 05:48 PM 8,674 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_10.rng.state.gz
01/26/2009 05:48 PM 14,289 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage_3_iter1_10.out
01/26/2009 05:48 PM 8,715 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage4_kk_1.rng.state.gz
01/26/2009 05:48 PM 13,938 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage4_kk_1.out
01/26/2009 05:48 PM 13,938 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage4_kk_2.out
01/26/2009 05:48 PM 8,619 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage4_kk_2.rng.state.gz
01/26/2009 05:48 PM 8,640 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage4_kk_3.rng.state.gz
01/26/2009 05:48 PM <DIR> ..
01/26/2009 05:48 PM 13,938 chk_S_1UB9A_2_00000105_ClassicAbinitio__stage4_kk_3.out
01/26/2009 05:48 PM <DIR> .
01/26/2009 05:48 PM 10,423 jumps.log
01/26/2009 05:49 PM 60,626 stdout.txt


Perhaps you could offer advice on how to look for any checkpointing problems. It seems it is either writing checkpoints more then it should... sometimes. Or, that it's got some models that complete in less then a minute and others that run for some time.

If you could tell us more about the naming used on these files, I guess that would clear up some of my doubts on what I'm looking at, and for.
29) Message boards : RALPH@home bug list : minirosetta v1.54 bug thread (Message 4556)
Posted 26 Jan 2009 by Profile feet1st
Post:
RE: limiting to 99 models
You will want to keep an eye on this one:
testD_cc2_1_8_mammoth_mix_cen_cst_hb_t327__IGNORE_THE_REST_1YYVA_5_7103_1_0

I've got 3hrs in to it so far and have 18 models, so I'm on track to exceed the new limit of 99 in my 24hr runtime preference. So this will be a good test.
30) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4535)
Posted 24 Jan 2009 by Profile feet1st
Post:

Hmmm, shouldn't that be a test? When it writes to the file it should check to see if it is hearing the limit, and if so, stop ... I mean, 24 hours worth of work down the tubes other than we discovered the error ... (thank you) ...

Paul, I think you are saying "shouldn't it have detected the problem much sooner?". It dawned on me later looking at how far over the file size was, that there must be much more to it then just the last model. It was actually wrapping up the entire task when it failed.

There are file size limits in BOINC, and it does check them as the task runs (so far as I know anyway). But this one may not have been detected because I'll bet the last thing the task did was zip it all up to send in. So, there was no way to know the final size until the compression completed.

But yes, seems to indicate that the task is producing too many models. And perhaps that there is some intermediate file size that could be further limited to assure the compressed size does not exceed the limit there. The other way around it would be to limit the number of models the task is allowed to produce. But this would mess up my runtime preference, and my future requests for work, because it would end significantly sooner then my 24hr preference.

Actually, this would be another good factor for the watchdog to keep tabs on. (or the logic about whether to start the next model) If he sees a problem, then he could get the current work reported rather then losing it.
31) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4522)
Posted 24 Jan 2009 by Profile feet1st
Post:
Yep, I was afraid of that...

1/23/2009 11:12:31 PM|ralph@home|Computation for task 1BJ1.mrtmdock.pdb_simpledocking.xml_3_8_6906_1_0 finished
1/23/2009 11:12:31 PM|ralph@home|Output file 1BJ1.mrtmdock.pdb_simpledocking.xml_3_8_6906_1_0_0 for task 1BJ1.mrtmdock.pdb_simpledocking.xml_3_8_6906_1_0 exceeds size limit.
1/23/2009 11:12:31 PM|ralph@home|File size: 30524004.000000 bytes. Limit: 25000000.000000 bytes

1BJ1.mrtmdock.pdb_simpledocking.xml_3_8_6906_1_0

The file was too large, so it calls it a compute error. Looks like it doesn't actually send the file when it grows too large. Too bad. It was 24 seconds short of 24hrs when it "failed", apparently writing the last model to the file.

Oh well... THIS is why I chose to run 24hr tasks on Ralph. To reveal these things. On Rosetta I do it because I like a tidy task list, and to minimize hits to the server.
32) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4519)
Posted 24 Jan 2009 by Profile feet1st
Post:
Anyone have any good ideas on how to track over time the number of checkpoint messages, as compared to the number of disk writes?


OH! Is that what all these new files are??
chk_S_1LARA_1_00000009_ClassicAbinitio___lc_3.out
chk_S_1LARA_1_00000009_ClassicAbinitio___lc_3.rng.state
chk_S_1LARA_1_00000010_ClassicAbinitio__stage_1.out
chk_S_1LARA_1_00000010_ClassicAbinitio__stage_1.rng.state

In fact I see many files now in my slot directory. Seems like blocks of 4 all written with same timestamp. But names vary, probably depending on what each of the model took the checkpoint.

Ok, yes my "boinc_checkpoint_count" file says 92, but I've got no where near that many files. And then even less blocks of time where files were written. Ya, I've only got 14 different timestamps. So, that sounds good.

I've got another docking task that says it's on model 258 after 22hrs (my preference is 24hrs), and so it's checkpoint count says 257, and I don't have any of the other files. Perhaps it is not taking checkpoints? The default.out file on that one is 43MB so far! Man is *THAT* upload going to take a while!
33) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4518)
Posted 24 Jan 2009 by Profile feet1st
Post:
The checkpoints seem more inline with my settings as of 1.52.

I'm a bit unclear as to what exactly to expect now. Sounds like if I set my preference to "write at most..." 600 seconds (10min) that I should expect the following...

I'll see checkpoint debug messages in my messages tab, but it may be that no data was written to disk?

And I'll see for a given task, within a given model, that it won't write more then every 10min?

...except if it reaches the end of a model, at which point it will write, regardless of how recently the last checkpoint was??

So, hypothetical example:

Time Event
mm:ss
00:00 Model start
01:15 checkpoint (but not written)
02:45 checkpoint (but not written)
05:15 checkpoint (but not written)
09:15 checkpoint (but not written)
11:30 checkpoint, all of the above written to disk
12:10 checkpoint (but not written)
13:40 checkpoint (but not written)
14:25 model completed, write to disk, even though only 3min since last write.

I think the above is what I should expect. Now... I've got a P4 running with HT, so 2 virtual cores... should I expect the tasks to behave independantly? i.e. each on their own 10 min "write at most" timer? Or should I expect them to both buffer for 10min. unless they reach a model end? And if a model end is reached on one, will that cause the buffers for the other to be written as well?

Anyone have any good ideas on how to track over time the number of checkpoint messages, as compared to the number of disk writes?
34) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4508)
Posted 23 Jan 2009 by Profile feet1st
Post:
FYI, in French "Gio" is "GB" (gigabytes)
35) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4499)
Posted 23 Jan 2009 by Profile feet1st
Post:


Feet1st , this is awesome - debugging on an unprecedented level :) Nice to get an idea of what all this looks like from your point of view.

These docking tasks are new and not mine - lemme track down the person submiting these and make sure the graphics app can deal with it.

Mike


I've seen a number of other reports of the screen saver/graphic just displaying as a black window. And I had always assumed people just weren't waiting long enough for the display to refresh. It does often take a long time, and I always assumed this was due to the allowed % of CPU time for the graphic. But, on the other hand, this wasn't an issue before about 2 or 3 months ago.

I meant to point out that the screenshot shows the graphic thread has used 4:02 of CPU time, but the corresponding Ralph thread is shown with only 2:11 of CPU received so far. So the % CPU shown in the screenshot is only the last interval, but you can see from the totals that the number is roughly what it's been during the entire 4 minutes the task has been running.

I was wondering if perhaps the graphic could always display at least it's grid lines, and text immediately, and perhaps a "protein information being retrieved... please wait" message in the frames. That way at least it would never just be "blank".
36) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4498)
Posted 23 Jan 2009 by Profile feet1st
Post:
v1.51

ERROR: unknown model name: 2FRHA_10
ERROR:: Exit from: d:boinc_buildminirosetta_windowsminisrcprotocols/abinitio/PairingStatistics.hh line: 170
called boinc_finish

on task
test_cc2_1_8_mammoth_mix_cen_cst_hb_t327__IGNORE_THE_REST_2F2EA_7_6860_1_1
37) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4493)
Posted 23 Jan 2009 by Profile feet1st
Post:
I tried loading up the docking task I got. It is 1.51. Displayed graphic just as the task was starting. Waited, waited... finally realized it was using more CPU then the thread working on the protein! Double checked Ralph settings for % of CPU for the graphic, set to default which is 10%.

Here's my screenshot showing the graphic monopolizing one core, while the two running tasks are competing for the other. Net result, nothing shown in the graphic after several minutes, and graphic thread consuming much more then 10% of CPU.



[edit]
I gave up on it, captured the screen, uploaded the screenshot, reported it here... then when I opened the graphic a second time it was better behaved. Not overusing CPU... but was essentially unusable. Go to resize or rotate the images and it wouldn't respond for about 30 seconds each time.
38) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4491)
Posted 22 Jan 2009 by Profile feet1st
Post:

> Step 900,000!

Step 900000 ? WHat does that mean ? "Step" ??


That was the step shown in the graphic. (to the right of the model number). I've just never seen such a large step number.
39) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4483)
Posted 22 Jan 2009 by Profile feet1st
Post:
This task completed my 24hr runtime preference on v1.48. But it reported 99 starting structures (not the usual "1") and 98 decoys. So, what happened to the last one?
40) Message boards : RALPH@home bug list : minirosetta v1.48-1.51 bug thread (Message 4482)
Posted 22 Jan 2009 by Profile feet1st
Post:
This task is running v1.51. It seems a bit on the large side in all dimensions here. It's been running for 6 hours, but is only on model 2. Step 900,000! It's peak memory usage so far was 430MB.

Probably what you were expecting for such a large protein, but definitely needs a high memory flag.

I believe the memory usage of the tasks is reported back with scheduler requests. Does the project process this data and query for anonomolies in memory usage? Or do you need us to report such things?


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